Sorry to comment on this still so late, but just for some clarity: these 1nF capacitors don't have to be 1% tolerance, 5% or even 10% should be fine. Their function is mostly to provide stability to the opamp, and reduce ringing when the input changes, but the exact cut-off frequency doesn't matter.
You can also substitute with polypropylene if C0G/NP0 ceramics are not available. But the ceramics should be cheap, 5% tolerance one are under 10 cents per piece.
Good to know, kassu. I will amend my DigiKey shared basket. Have to edit it anyway, as made some inexplicable errors..
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Thank you for your offer, but I would prefer TQFP package, because is much easier to solder.
Yes, that I noted for the next revision. The foot package in eagle is a bit smaller than the real types. And the 3,3V supply has to be rethink. Johannes wrote somewhere on the forum more about the different VDD types.
@Kalle yes, it's still possible. One PCB is left over. I think 5 Beta testers are a good start to check everything. I will send you PM with further informations
And thank you @kassu !
The build document is at version 1. By which I mean I used it to build mine and since my core board is sitting in its eurorack case passing its tests i think the document is ready for more eyes! The core board build was pretty straightforward. There are a couple of things I would have done different:
do you really need 2 cut the midi part / i have some space left in my eurorack and dont find
much info making it work again if anyone can give some advice ... don't want to break it !!!
still waiting for pots and pushbuttons and other components / i have to be patience ....
i have a paia 9700 modular frack rack hoping this wont be a problem with the power ?
i just bought an eurorack so the power will come from that ...reading a lot about it but want a second opinion
If you dont cut the midi part it wont fit in a eurorack in the way Paul has designed it. You could change the orientation of the board, which is possible, but means you should most likely design a new front panel.
The board still works without the midi and power part, and even though I haven't had to put it back together it was designed by @johannes to work this way, you just have to reconnect the circuits with a bit of wire.
You'd need to mount the Axolotl the other way round, and the module would be way too wide, with the MIDI part as well.
Paul is designing an expander module to break out the MIDI in and out ports, the micro USB programming socket, and 2x CV outputs.
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Moved discussion about the MAX11300 adc/dac chip into a separate thread here: https://sebiik.github.io/community.axoloti.com.backup/t/max11300-for-cv-out-and-cv-out/1568
Further to the questions I asked in the wrong place (doh) https://sebiik.github.io/community.axoloti.com.backup/t/euxoloti-hardware-version-confusion/1667 will the new pcbs still be open source?
hi everyone, as I posted in an other thread, the new proto boards have arrivedā¦after assembling everything, beside button reading (done by a 74hc165) where I have forgotten an tristate buffer to block miso message while reading other ICs, workedā¦but now I got stocked. my adc don't read the right values and jumping. I also have a conflicts with different spi clock req. rate. Some source on the internet wrote that this a clear sign for spi errorā¦
VDD is stable at 3,31V and adc channel 0-6 is stable at 1,647V. So dial position should be around 32.75ā¦
I have tried three different pairs of mcp6004 op amps and mcp3208.
I also connected a brand new mcp3208 to axo and a breadboard and recorded axo<->adc spi communication by logic sniffer.
maximum analog<->digital ground resistance is not higher then 0,1Ī©...
1. test round
ADC CH0 = VDD = Axoloti hex object: 0x87FF0000
test round
ADC CH0 = 1,647V = Axoloti hex object: 0x83D40000 or 0x83E40000
test round
ADC CH0 = GND = Axoloti hex object: 0x00800000
I got the same results with adc on breadboard and axoloti only.
Does anyone have any suggestions to solve this problem?
current prototype revision schmeatic
update spi debug session.
OK, I think I know what's going wrong at SPI. it's a problem of clock cycle length and transmitting datas on MISO.
the main core + control pcb works
but if some other ICs are added to the spi bus, I got odd value from ADC.
It seems that the adc value are shifted by 1 bit while transmit session on MISO line.
What I have done since now:
checked VDD (axoloti, mcp3208, mcp6004) by oscilloscope and it's stable while powering from eurorack psu (Axo 5V = 4,98V and axo VDD is 3,31V). If euxo core pcb and axoloti is only powered by usb, axoloti monitor shows red voltage values (4,73V) for 5V line but now voltage drop outs or disconnections. VDD stays stable at 3,21V.
no shorting between communication lines or VDD and GND.
In last revision the adcs and op amps are powered by an external 3,3V vreg and Vref of each ADC (AVDD) is connected to VDD and its filtered by a 10Ī© resistor. Pots are also connected to AVDD. I also disconnected ICs' VDD from ext. vreg and connected them to axo VDD vreg.
traceroute length MOSI = 101,7mm; MISO = 98,35mm; SCLK = 110,39mm; CS1(ADC 1/cv ins) = 65,57mm; CS2(ADC2/Pots) = 88,29mm
eagle files
measured resistance of several different points(VDD,AGND-GND, AXO GND-EURORACK, SPI IC-AXO etc.) and it's at max. 0,1Ī©(tool has a tolerance of 0,1% 
)
checked spi message by bus pirate and logic sniffer at IC socket of both mcp3208 and directly at the breakout row next to the axoloti core header row. no problems, some longer cycles are recorded ( check post before) and axoloti stops to receive correct adc values.
Setup different ICs for SPI communication on a new breadboard ā¦same but after a while axoloti shuts down like there is a shorting or something consumes more power then axo can deliver. breadboard ICs are powered by axo's VDD.
tried axoloti 1.0.6 and axoloti 1.0.10; and different Macs.
tested different SPI modes and clock speed. no problem with euxo core adcs at SPI only. same with connected control pcb.
tried 4 different type pairs of ICs.
tested previous euxo prototype and this one works out of the box with more ICs on SPI bus.
So does anybody know, what's the cause for the spi (clock) problem? I don't know how to fix this problem.
Edit:
here are axo patch and my script2 object code for reading pots and cv ins:
euxo cv&pot read
script2 object code
Hi!
This is a very interesting project. It would be fantastic to use the Axoloti in a Eurorack system!
Is this project still active?
How are the already owners working with the Euxoloti? How is the experience?
Will it be posible to order an Euxoloti already mounted in the future?
Thanks!
Hi Everyone,
Does anyone know what the status of Euxoliti is? I've seen the Euxoloti site still says new boards will be printed March 2017... but he hasn't posted here since last August, Hasn't tweeted since October, and hasn't commited anything on Github since February. Has anyone heard from Paul?
hey , i build two versions of euxoloti and i can say Paul's a friend but the project needs a serious update there is still no correct v/octave
i wish more people get involved or maybe helping out the problem would be awesome !!!
Okay, in that case maybe I'll have to break down and buy a few pcbs on OSH park... unless someone already has some lying around? 
Last I heard, Paul had been having persistent internet-connection problems, and was therefore effectively offline, much of the time.
I imagine this has been hampering his ability to continue with the project (though, knowing Paul, in pretty sure he's been keeping busy with some interesting project or other).
Hopefully we will all hear from him again soon.
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