1/*
2 * File: van_der_pol_osc.h
3 *
4 * Code generated for Simulink model 'van_der_pol_osc'.
5 *
6 * Model version : 1.5
7 * Simulink Coder version : 8.10 (R2016a) 10-Feb-2016
8 * C/C++ source code generated on : Sun Jun 05 15:57:58 2016
9 *
10 * Target selection: ert.tlc
11 * Embedded hardware selection: ARM Compatible->ARM Cortex
12 * Code generation objectives:
13 * 1. Execution efficiency
14 * 2. RAM efficiency
15 * Validation result: Not run
16 */
17
18#ifndef RTW_HEADER_van_der_pol_osc_h_
19#define RTW_HEADER_van_der_pol_osc_h_
20#include <stddef.h>
21#include <math.h>
22#include <string.h>
23#ifndef van_der_pol_osc_COMMON_INCLUDES_
24# define van_der_pol_osc_COMMON_INCLUDES_
25#include "rtwtypes.h"
26#include "rtw_continuous.h"
27#include "rtw_solver.h"
28#endif /* van_der_pol_osc_COMMON_INCLUDES_ */
29
30/* Macros for accessing real-time model data structure */
31#ifndef rtmGetErrorStatus
32# define rtmGetErrorStatus(rtm) ((rtm)->errorStatus)
33#endif
34
35#ifndef rtmSetErrorStatus
36# define rtmSetErrorStatus(rtm, val) ((rtm)->errorStatus = (val))
37#endif
38
39#ifndef rtmGetStopRequested
40# define rtmGetStopRequested(rtm) ((rtm)->Timing.stopRequestedFlag)
41#endif
42
43#ifndef rtmSetStopRequested
44# define rtmSetStopRequested(rtm, val) ((rtm)->Timing.stopRequestedFlag = (val))
45#endif
46
47#ifndef rtmGetStopRequestedPtr
48# define rtmGetStopRequestedPtr(rtm) (&((rtm)->Timing.stopRequestedFlag))
49#endif
50
51#ifndef rtmGetT
52# define rtmGetT(rtm) (rtmGetTPtr((rtm))[0])
53#endif
54
55/* Forward declaration for rtModel */
56typedef struct tag_RTM RT_MODEL;
57
58/* Block signals and states (auto storage) for system '<Root>' */
59typedef struct {
60 real_T Integrator; /* '<Root>/Integrator' */
61 real_T Sum; /* '<Root>/Sum' */
62} DW;
63
64/* Continuous states (auto storage) */
65typedef struct {
66 real_T Integrator1_CSTATE; /* '<Root>/Integrator1' */
67 real_T Integrator_CSTATE; /* '<Root>/Integrator' */
68} X;
69
70/* State derivatives (auto storage) */
71typedef struct {
72 real_T Integrator1_CSTATE; /* '<Root>/Integrator1' */
73 real_T Integrator_CSTATE; /* '<Root>/Integrator' */
74} XDot;
75
76/* State disabled */
77typedef struct {
78 boolean_T Integrator1_CSTATE; /* '<Root>/Integrator1' */
79 boolean_T Integrator_CSTATE; /* '<Root>/Integrator' */
80} XDis;
81
82#ifndef ODE3_INTG
83#define ODE3_INTG
84
85/* ODE3 Integration Data */
86typedef struct {
87 real_T *y; /* output */
88 real_T *f[3]; /* derivatives */
89} ODE3_IntgData;
90
91#endif
92
93/* Real-time Model Data Structure */
94struct tag_RTM {
95 const char_T *errorStatus;
96 RTWSolverInfo solverInfo;
97
98 /*
99 * ModelData:
100 * The following substructure contains information regarding
101 * the data used in the model.
102 */
103 struct {
104 X *contStates;
105 int_T *periodicContStateIndices;
106 real_T *periodicContStateRanges;
107 real_T *derivs;
108 boolean_T *contStateDisabled;
109 boolean_T zCCacheNeedsReset;
110 boolean_T derivCacheNeedsReset;
111 boolean_T blkStateChange;
112 real_T odeY[2];
113 real_T odeF[3][2];
114 ODE3_IntgData intgData;
115 } ModelData;
116
117 /*
118 * Sizes:
119 * The following substructure contains sizes information
120 * for many of the model attributes such as inputs, outputs,
121 * dwork, sample times, etc.
122 */
123 struct {
124 int_T numContStates;
125 int_T numPeriodicContStates;
126 int_T numSampTimes;
127 } Sizes;
128
129 /*
130 * Timing:
131 * The following substructure contains information regarding
132 * the timing information for the model.
133 */
134 struct {
135 uint16_T clockTick0;
136 time_T stepSize0;
137 uint16_T clockTick1;
138 SimTimeStep simTimeStep;
139 boolean_T stopRequestedFlag;
140 time_T *t;
141 time_T tArray[2];
142 } Timing;
143};
144
145/* Continuous states (auto storage) */
146extern X rtX;
147
148/* Block signals and states (auto storage) */
149extern DW rtDW;
150
151/* Model entry point functions */
152extern void van_der_pol_osc_initialize(void);
153extern void van_der_pol_osc_step(void);
154
155/* Real-time Model object */
156extern RT_MODEL *const rtM;
157
158/*-
159 * These blocks were eliminated from the model due to optimizations:
160 *
161 * Block '<Root>/To Workspace' : Unused code path elimination
162 * Block '<Root>/To Workspace1' : Unused code path elimination
163 */
164
165/*-
166 * The generated code includes comments that allow you to trace directly
167 * back to the appropriate location in the model. The basic format
168 * is <system>/block_name, where system is the system number (uniquely
169 * assigned by Simulink) and block_name is the name of the block.
170 *
171 * Use the MATLAB hilite_system command to trace the generated code back
172 * to the model. For example,
173 *
174 * hilite_system('<S3>') - opens system 3
175 * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
176 *
177 * Here is the system hierarchy for this model
178 *
179 * '<Root>' : 'van_der_pol_osc'
180 */
181#endif /* RTW_HEADER_van_der_pol_osc_h_ */
182
183/*
184 * File trailer for generated code.
185 *
186 * [EOF]
187 */
188